Semiconductor devices, such as transistors, are the core building block of the vast majority of electronic devices. It is desirable to accurately and precisely fabricate transistors and other semiconductor devices with physical features having their intended physical dimensions, to thereby achieve semiconductor devices having their intended performance characteristics and improve yield. In practice, however, performance variations exist among the hardware tools used to fabricate the devices, making it difficult to produce identical devices using identical settings on each tool. For example, the settings of two different etch chambers of the same make and/or model may be configured to implement identical process conditions, but the physical dimensions of a feature etched using one chamber may be different from the physical dimensions of that same feature etched using the other chamber. Additionally, the performance characteristics of a hardware tool may change over time, which may result in feature dimensions that drift over time even though the process conditions are unchanged. As a result of the aforementioned problems, devices may be fabricated with features that deviate from their intended physical dimensions, which, in turn, may lead failures at wafer test and/or reduce yield.